Network Security - A Literature Review

Authors

  • Dr. Indira Reddy  Department of Information Technology, Sreenidhi Institute of Science and Technology, Hyderabad, Telangana, India
  • A. Srilekha  Department of Information Technology, Sreenidhi Institute of Science and Technology, Hyderabad, Telangana, India

Keywords:

Cryptography, Advanced Encryption Standard (AES), Encryption, Unscrambling,Rijndael, Hardware Description Language (HDL), Field Programmable Gate Cluster (FPGA).

Abstract

Advanced Encryption Standard algorithm also known as Rijndael calculation is a sort of Network Security calculation which is for the most part utilized in a wide range of wired and remote computerized correspondence systems between two end users for Secure transmission of data especially over a public network. In this work we dissect the structure and plan of new AES, following three criteria: a) opposition against every single known assault; b) speed and code conservativeness on a wide scope of stages; and c) structure effortlessness. The use of Internet has grown fast currently for commercial transactions and has huge demand for privacy of the data and security for the networks. The Synthesis Tool was set to enhance Speed and Power. The region and throughput are cautiously exchanging off to make it appropriate for remote military correspondence and versatile communication.

References

  1. Banraplang Jyrwa and Roy Paily ,ECE dept ,NIT Jalandhar and IIT Guwahati, IEEE.
  2. Hoang Trang, Nguyen Van Loi University of Technology, IC Design Research & Education center, VietNam National University HochiMinh City.
  3. Jalel Rejeb, Vidyashankar Ramaswamy Electrical Engineering Department, san Jose State University.
  4. P.Kitsos, N. Sklavos and O. Koufopavlou University of Patras/Electrical and Computer Engineering Department, Patras.
  5. Abhijith.P.S, Mallika Srivastava, Aparna Mishra, Dept. of Microelectronics, IIITA Indian Institute of Information Technology, Allahabad, India.
  6. Muhammad Farhan Wali, Muhammad Rehan Division of Electronics Engineer,NED University of Engineering and Technology, Karachi.
  7. C. Sanchez-Avilaf and R. Sanchez-Reillot Dpto. de Matematica Aplicada,E.T.S.I. Telecomunicacion, Universidad Politecnica de Madrid, 28040 Madrid.
  8. N Sivasankari, K Rampriya1 and A Muthukumar Department of ECE, Mepco Schlenk Engineering College, Sivakasi, India.
  9. Prachi V. Bhalerao, Rahul D. Ghongade2 , Vishal B. Langote ExTC Department and SGBAU University, India H.O.D., ExTC Department and SGBAU University, India.
  10. B. Nageswara Rao1 , D. Tejaswi, K. Amrutha Varshini3 , K.Phani Shankar, B. Prasanth International Journal For Technological Research In Engineering Volume 4, Issue 8, April-2017.
  11. William Stallings, “Cryptography and Network Security-Principles and Practice,”Fifth Edition, Prentice Hall, Pearson.
  12. Ahmad, N.; Hasan, R.; Jubadi, W.M Plan of AES S-Box utilizing combinational rationale improvement, IEEE Symposiumon Industrial Hardware and Applications (ISIEA), pp. 696-699, 2010.
  13. Mr. Atul M. Borkar, Dr. R. V.Kshirsagar and Mrs. M. V. Vyawahare, FPGA Implementation of AES International Conference on Electronics Computer Technology (ICECT), pp. 401-405, 2011 third.
  14. K. Järvinen, M. Tommiska, and J.Skyttä, Near study of superior cryptographic calculation usage on FPGAs, in Proc. of IEE on Data Security, Vol. 152,pp. 3-12, 2005.
  15. D. S. Kundi, S. Zaka, Q. Ain and A.Aziz,A minimized AES encryption center on Xilinx FPGA", in Proc. of second Worldwide Conference on Computer, Control and Correspondence, pp.1-4, 2009.
  16. A. Aziz and N. Ikram, Memory effective usage of AES S-boxes on FPGA& Journal of Circuits, Systems, and PCs.
  17. A. H. Saleh and S. S. B Ahmed,Elite AES configuration utilizing pipelining structure over GF ((24 ) 2 ), in Proc. Of IEEE International Conference on Signal Processing and Correspondences, pp. 716-, 2007.
  18. N. Pramstaller and J. Wolkerstorfer, An all inclusive and productive AES co-processor for field programmable rationale clusters, in Proc. of fourteenth International Conference on Field- Programmable Logic and its Applications, pp. 565-574, 2004.
  19. FIPS-197, NIST - National Institute of Standards and Technology, “Announcing the ADVANCED ENCRYPTION STANDARD (AES),”
  20. W. Wei, C. Jie and X. Fei, “An Implementation of AES Algorithm on FPGA,” IEEE 9th Int. Conf. on Fuzzy Systems and Knowledge discover 2012.
  21. U. Kretzschmar, A. Astarloa, J. Lazaro, U.Bidarte and J.Jimenez, “Robustness analysis of different AES implementations on SRAM based FPGAs,.
  22. J. Daeme and V. Rijmen, “AES proposal: Rijndael,” NIST AES Proposal, June 1998.
  23. W. Stallings, “Cryptography and network security principles and practice,” Pearson edition 2009, pp. 135-160.
  24. P.V.S. Shastry, A. Agnihotri, D. Kachhwaha, J. Singh and M.S. Sutaone, “A Combinational Logic Implementation of S-Box of AES,” IEEE 54 th Int. Midwest Symp. on Circuits and Systems (MWSCAS), Aug.2011.
  25. S. Kaur and R. Vig, “Efficient Implementation of AES Algorithm in FPGA Device,”
  26. H. Trang and N.V. Loi, “An efficient FPGA implementation of the Advanced Encryption Standard algorithm,” IEEE Int.
  27. N. Koblitz, A Course in Number Theory and Cryptography, Springer-Verlag New York Inc., 1987.
  28. M. Matsui, Linear Cryptanalysis method for DES cipher, Advances in Cryptology, Proc. Euro- crypt’93, LNCS 765, Springer-Verlag, 1994, pp. 386-397.
  29. S. Murphy and M. Robshaw, New observations on Rijndael, version of August 7, 2000.
  30. B. Schneier and D. Whiting, APerformance Comparison of the Five AES Finalist, 15 March 2000.
  31. J. Daemen, Cipher and hash function design strategies based on linear and differential cryptanalysis,Doctoral Dissertation, March 1995, K.U. Leuven.
  32. M. Hellman and S. Langford, Differential-Linear Cryptanalysis, Advances in Cryptology, Proc.Cryto’94, LNCS-839, Springer-Verlag, 1994.

Downloads

Published

2019-07-30

Issue

Section

Research Articles

How to Cite

[1]
Dr. Indira Reddy, A. Srilekha, " Network Security - A Literature Review, IInternational Journal of Scientific Research in Computer Science, Engineering and Information Technology(IJSRCSEIT), ISSN : 2456-3307, Volume 5, Issue 4, pp.50-55, July-August-2019.