Design and Implementation of Logic Gates using Artificial Neural Networks on FPGA

Authors(2) :-Bharath Rao Madela, V. Yaswanth Siva Sai

In this paper, a hardware implementation of artificial neural networks and implementation of logic gates using artificial neural networks on Field Programmable Gate Arrays (FPGA) is presented. A digital system architecture for feed forward multilayer neural network is realized. The parallel structure of a neural network makes it potentially fast for the computation of certain tasks that makes a neural network well suited for implementation in VLSI technology. Then logic gates are implemented using Feed Forward Neural Network. FPGA has been used to reduce the unit neuron hardware by designing the activation function inside the neuron without the need of lookup tables. The whole design is realized using Verilog HDL and is implemented on FPGA.

Authors and Affiliations

Bharath Rao Madela
Department of Electronics and Communication Engineering, SVNIT, Surat, Gujarat, India
V. Yaswanth Siva Sai
Department of Electronics and Communication Engineering, SVNIT, Surat, Gujarat, India

Artificial Neural Network, FPGA, Verilog, Activation Function, Feed Forward Propagation

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Publication Details

Published in : Volume 2 | Issue 5 | September-October 2017
Date of Publication : 2017-10-31
License:  This work is licensed under a Creative Commons Attribution 4.0 International License.
Page(s) : 243-247
Manuscript Number : CSEIT172551
Publisher : Technoscience Academy

ISSN : 2456-3307

Cite This Article :

Bharath Rao Madela, V. Yaswanth Siva Sai, "Design and Implementation of Logic Gates using Artificial Neural Networks on FPGA", International Journal of Scientific Research in Computer Science, Engineering and Information Technology (IJSRCSEIT), ISSN : 2456-3307, Volume 2, Issue 5, pp.243-247, September-October-2017.
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