Secure Prominent Data Transmission through Advance Encryption Standard

Abstract

To implement the advanced encryption standard (AES) algorithm in efficient way throughput architecture is proposed. In this proposed architecture we are using integrated AES encryption and decryption designs. Now the entire architecture consists of 128 bits which are divided into two parts mainly they are higher and lower parts. But the proposed AES will perform the operation at lower part. In proposed architecture we perform some operations like sub-byte substitution and INV sub-byte substitution. At each stage of this substitution, it will perform a normal AES Operation but the computation is reduced by half. So in the proposed architecture the sub-type and INV sub-byte substitutions will give reduction in critical path delay and also the key expansion modules.