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Sanyal, A.; Jain, A.; Dey, A.; Gupta, P. K. A High-Speed Floating Point Matrix Multiplier Implemented in Reconfigurable Architecture. Int. J. Sci. Res. Comput. Sci. Eng. Inf. Technol 2024, 10 (2), 193-199. https://doi.org/10.32628/CSEIT2390661.