Design and Implementation of Logic Gates using Artificial Neural Networks on FPGA

Authors

  • Bharath Rao Madela  Department of Electronics and Communication Engineering, SVNIT, Surat, Gujarat, India
  • V. Yaswanth Siva Sai  Department of Electronics and Communication Engineering, SVNIT, Surat, Gujarat, India

Keywords:

Artificial Neural Network, FPGA, Verilog, Activation Function, Feed Forward Propagation

Abstract

In this paper, a hardware implementation of artificial neural networks and implementation of logic gates using artificial neural networks on Field Programmable Gate Arrays (FPGA) is presented. A digital system architecture for feed forward multilayer neural network is realized. The parallel structure of a neural network makes it potentially fast for the computation of certain tasks that makes a neural network well suited for implementation in VLSI technology. Then logic gates are implemented using Feed Forward Neural Network. FPGA has been used to reduce the unit neuron hardware by designing the activation function inside the neuron without the need of lookup tables. The whole design is realized using Verilog HDL and is implemented on FPGA.

References

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IInternational Journal of Scientific Research in Computer Science, Engineering and Information Technology

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Published

2017-10-31

Issue

Volume 2, Issue 5, September-October-2017

Section

Research Articles

License

Copyright (c) IJSRCSEIT

Creative Commons License

This work is licensed under a Creative Commons Attribution 4.0 International License.

How to Cite

[1]
Bharath Rao Madela, V. Yaswanth Siva Sai, " Design and Implementation of Logic Gates using Artificial Neural Networks on FPGA, IInternational Journal of Scientific Research in Computer Science, Engineering and Information Technology(IJSRCSEIT), ISSN : 2456-3307, Volume 2, Issue 5, pp.243-247, September-October-2017.