Analysis of Low Phase Noise and Low Power CMOS VCO – A Review

Authors

  • Sonu Kumar  Electronics and Communication Engineering, Bhabha Engineering Research Institute, Bhabha University, Bhopal, Madhya Pradesh, India
  • Ateek Mansoori  Electronics and Communication Engineering, Bhabha Engineering Research Institute, Bhabha University, Bhopal, Madhya Pradesh, India

Keywords:

Phase noise, power consumption, VCO, CMOS

Abstract

Four different topologies of VCO near 100 GHz for low power consumption and low phase noise are studied in this paper. After comparing these different topologies of VCO, it is seen that complementary LC VCO provides minimum power consumption of 7.59 mW at 32 nm CMOS technology and VCO with optimum pumping method provides minimum phase noise of -85 dBc/Hz @10MHz.

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IInternational Journal of Scientific Research in Computer Science, Engineering and Information Technology

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Published

2023-08-30

Issue

Volume 9, Issue 4, July-August-2023

Section

Research Articles

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This work is licensed under a Creative Commons Attribution 4.0 International License.

How to Cite

[1]
Sonu Kumar, Ateek Mansoori, " Analysis of Low Phase Noise and Low Power CMOS VCO – A Review" International Journal of Scientific Research in Computer Science, Engineering and Information Technology(IJSRCSEIT), ISSN : 2456-3307, Volume 9, Issue 4, pp.446-451, July-August-2023.