SANYAL, Atri; JAIN, Ashika; DEY, Anwesha; GUPTA, Prakash Kumar. A High-Speed Floating Point Matrix Multiplier Implemented in Reconfigurable Architecture. International Journal of Scientific Research in Computer Science, Engineering and Information Technology, [S. l.], v. 10, n. 2, p. 193–199, 2024. DOI: 10.32628/CSEIT2390661. Disponível em: https://ijsrcseit.com/index.php/home/article/view/CSEIT2390661. Acesso em: 1 aug. 2025.