Manoj Murali, “Power, Performance, and Area-efficient Designs at Lower Nodes: Saving Billions in Semiconductor Manufacturing”, Int. J. Sci. Res. Comput. Sci. Eng. Inf. Technol, vol. 11, no. 2, pp. 2168–2183, Mar. 2025, doi: 10.32628/CSEIT23112577.